Category: PROCESS

  • The Semiconductor World Still Runs On Older Nodes

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    How Large Is The Mature Node Economy

    The focus immediately shifts to cutting-edge nodes such as 3nm or 5nm when discussing semiconductors. However, the economic and technological importance of mature semiconductor processes, typically those at or above the 28nm (or 40nm in many cases) node, remains substantial and essential to the industry’s foundation.

    Key technical and economic advantages of mature nodes:

    • Cost Efficiency and Equipment Depreciation: Mature semiconductor processes utilize fully depreciated equipment, dramatically lowering capital investment and operational costs compared to advanced-node manufacturing.
    • High Yield and Process Stability: Due to extensive operational experience, mature nodes achieve consistently high yields. Process maturity and thoroughly characterized manufacturing steps significantly enhance productivity and reduce variability.
    • Established IP and Rapid Qualification: Mature nodes feature extensive intellectual property (IP) libraries and proven design ecosystems, facilitating faster qualification, shorter design cycles, and more predictable product ramps.

    These legacy nodes form the critical backbone across numerous essential industries. They drive analog integrated circuits (ICs), power management ICs, automotive microcontrollers, display driver ICs, embedded non-volatile memory solutions, and various sensor-based applications. From a financial standpoint, mature nodes generate a robust, multi-billion-dollar revenue stream, providing economic stability and supporting foundational technologies critical to numerous global industries.


    Technical Sweet Spots That Keep Older Nodes Relevant

    Mature semiconductor nodes possess distinct technical strengths that make them uniquely valuable. They provide specialized features that are challenging or costly for advanced nodes to replicate. Automotive microcontrollers, motor control ICs, industrial controllers, and battery management systems frequently achieve optimal performance within planar CMOS nodes between 40 and 90 nanometers.

    Globally, mature-node manufacturing also continues to represent more than half of total wafer output, dominating 200 mm (eight-inch) and 300 mm (twelve-inch) wafer fabs across semiconductor hubs in Taiwan, the United States, Europe, and Asia.

    These mature technologies offer robust embedded nonvolatile memory capabilities, delivering high-speed access and extended data retention, which are critical attributes in demanding automotive and industrial environments. Additionally, they leverage thick-oxide transistor designs, which comfortably support voltages above 60 volts, enabling reliable operation in power management and motor control circuits.

    Precision analog front-end circuits are another strong suit for older nodes, benefiting from inherently lower noise characteristics and superior linearity thanks to larger transistor dimensions. Integrating these analog functions alongside substantial nonvolatile memory on a single chip significantly reduces complexity and cost, particularly when incorporating similar functionalities within advanced FinFET-based nodes.

    Together, these technical advantages solidify mature nodes as the optimal choice for specific use cases where reliability, analog precision, high-voltage handling, and cost efficiency are paramount.


    Fresh Money Flows Into Legacy Capacity

    Investment and capacity expansion in mature semiconductor nodes are not merely ongoing. They are accelerating significantly. Across the industry, foundries are rapidly scaling their mature-node manufacturing capabilities, with expansions frequently adding tens of thousands of wafers per month to existing facilities. For instance, one prominent foundry is boosting its 28nm, targeting robust demand from the automotive, industrial, and consumer electronics sectors.

    At the same time, governments worldwide recognize the strategic importance of mature nodes, resulting in significant financial support. For example, recent government initiatives include a commitment of more than a billion dollar to enhance domestic mature-node manufacturing in the United States, explicitly aiming to bolster capabilities critical for the automotive, industrial, defense, and aerospace sectors.

    Similar expansions globally reinforce this trend. European governments have initiated strategic investments in fabs operating between 22 and 180nm nodes to strengthen regional supply chains and ensure technological sovereignty. Meanwhile, joint ventures across the globe (mainly in Asia and EU) are significantly increasing capacity at nodes such as 90nm and 180nm to meet the growing demand for analog and power-management ICs.


    Strategic Outlook For Engineers, Investors, And Policy Makers

    Older semiconductor nodes are far from obsolete. They represent highly optimized platforms meticulously refined through decades of production experience. These mature nodes deliver exceptional reliability, predictable yield performance, and proven operational stability.

    Their inherent cost efficiency, driven by fully depreciated equipment and mature manufacturing processes, makes them economically compelling. Additionally, specialized performance characteristics such as high-voltage handling, precision analog integration, robust embedded memory solutions, and radiation tolerance make older nodes indispensable for specific market segments, including automotive, industrial, and aerospace.

    A summarized strategic perspective:

    StakeholderStrategic Importance
    EngineersMature nodes provide trusted solutions for analog precision, high-voltage capabilities, radiation tolerance, and embedded non-volatile memory. Extensive IP reuse accelerates design timelines.
    InvestorsFully depreciated fabs with predictable, stable demand offer attractive margins. Investments have lower risk profiles due to established processes and equipment.
    Policy MakersMature semiconductor processes are strategically essential for national security, automotive resilience, and economic stability. Policy frameworks increasingly treat legacy semiconductor manufacturing as critical infrastructure rather than commodity production.

    Collectively, these strategic considerations confirm that older semiconductor nodes will maintain their critical role well into the next decade, even as the semiconductor industry’s leading edge continues to advance toward ever-smaller technology nodes.


  • The Key Factors In Semiconductor Node Selection

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    Importance Of Semiconductor Node Selection

    Choosing the right technology node is among the most critical engineering and business decisions in semiconductor design, especially for ASIC (Application-Specific Integrated Circuit) and SoC (System-on-Chip) development. The selection impacts performance, power efficiency, area, cost, design complexity, and market viability.

    As semiconductor technology advances, nodes have shrunk from 180nm in the early 2000s to cutting-edge 3nm and beyond, enabling greater transistor density, higher speeds, and lower power consumption.

    However, transitioning to an advanced node is not always the best choice, designers and businesses must carefully evaluate multiple trade-offs based on technical feasibility, business impact, and long-term manufacturability.

    Understanding Technology Nodes

    A technology node, often denoted in nanometers (e.g., 28nm, 7nm, 5nm), represents a semiconductor manufacturing process. Traditionally, this figure referred to the transistor gate length. Still, modern node names now encompass multiple process optimizations beyond feature size, including metal pitch scaling, contact efficiency, and new transistor architectures.

    Key technology transitions:

    • 180nm to 65nm: Introduction of copper interconnects, replacing aluminum for better performance
    • 45nm to 28nm: The introduction of high-k metal gate (HKMG) technology reduces leakage and improves power efficiency
    • 16nm/14nm: Transition from planar transistors to FinFETs, drastically improving performance and power
    • 7nm and below: Extreme Ultraviolet Lithography (EUV) becomes necessary to print more minor features
    • 3nm and beyond: Adoption of GAAFET (Gate-All-Around FETs) and stacked nanosheet transistors, enabling further scaling

    Each transition increases manufacturing complexity and cost, requiring companies to strategically evaluate whether a given node justifies its investment. Thus making the semiconductor node selection for product development a key step.


    Key Factors In Selecting A Semiconductor Node

    The choice of a semiconductor node significantly influences a product’s performance, cost structure, and time to market. In a competitive landscape where efficiency, pricing, and innovation drive success, companies must carefully assess whether migrating to an advanced node justifies the investment or if leveraging mature nodes provides better returns. A well-chosen node can determine whether a company leads in performance or struggles with cost overruns.

    The following table consolidates key trade-offs across performance, cost, manufacturing complexity, and time-to-market for a holistic comparison.

    FactorUltra-Advanced NodesMature Nodes
    Transistor DensityHigher density, enabling better computational power for AI, 5G, and HPC.Lower transistor density, sufficient for automotive, and industrial applications.
    Power EfficiencyLower operating voltage, but leakage increases below 7nm, making power savings diminishing.More power-efficient at lower clock speeds, making it ideal for battery-powered and energy-sensitive applications.
    Performance ScalingSupports higher clock speeds, AI acceleration, and parallel processing.Sufficient for applications where performance is secondary to efficiency.
    Wafer Cost$9,000–$16,000+ per wafer due to EUV lithography & complex fabrication.$700–$4,000 per wafer, providing cost-effective production.
    Design CostDesign cost increases from ~$50M to over $250M.Lower NRE (Non-Recurring Engineering) costs and widely available design libraries, reducing upfront investment.
    EDA And IP CostsHigh, requiring newer EDA tools, optimized IP, and extensive validation.Mature design ecosystem with proven IP availability, lowering risk.
    Yield StabilityLower initial yield, leading to higher cost per functioning chip.Stable manufacturing yields, reducing cost per chip.
    Manufacturing OptionsOnly TSMC, Samsung, and Intel manufacture below 5nm, leading to foundry capacity constraints.More foundry options, including GlobalFoundries, UMC, and SMIC, offering higher supply chain flexibility.
    Lithography Complexity7nm and below require EUV lithography, significantly increasing fab investment and lead time.Uses DUV (Deep Ultraviolet) lithography, which is cheaper and widely available.
    Geopolitical RisksHeavily affected by trade regulations, impacting supply chain security and fab access.More resilient supply chain, with diversified manufacturing hubs.
    Time To Market2-3 years to stabilize, requiring early adoption risk-taking.Faster time-to-market, leveraging proven, mature manufacturing processes.
    Market AdoptionSelected players push leading-edge nodes for competitive advantage in premium segments.Automotive and industrial players favor mature nodes for cost savings and reliability.

    Industry Applications And Node Preferences

    Different industries prioritize semiconductor nodes based on a balance of performance, power efficiency, cost, and long-term reliability. While cutting-edge nodes (5nm and below) enable high-performance AI, 5G, and data center applications, many industries still rely on mature nodes (28nm, 40nm, 65nm) for cost-effectiveness, power savings, and extended lifecycle support.

    Consumer electronics devices, such as wearables and smart home gadgets, benefit from 28nm and 40nm nodes, where lower power consumption and affordability take precedence over raw performance. On the other hand, automotive and industrial applications require long-term reliability and strict safety certifications, making 16nm to 28nm a preferred range due to well-established process stability and supply chain availability.

    For smartphones and edge AI, 7nm and 5nm nodes dominate, offering optimized power efficiency, AI acceleration, and support for 5G connectivity. These nodes balance performance and battery life, which is crucial for mobile devices. High-performance computing (HPC) and AI processors push the limits further, leveraging 5nm, 4nm, and even 3nm to maximize computational density and parallel processing capabilities.

    Meanwhile, medical, aerospace, and industrial automation sectors prioritize older nodes such as 65nm and 40nm for radiation tolerance, long-term operational stability, and cost-effectiveness. Embedded systems and microcontrollers, found in industrial controllers and legacy automotive applications, often remain at 90nm and above, where cost and simplicity outweigh the need for aggressive scaling.

    Ultimately, node selection is driven by industry-specific needs rather than a race toward the smallest feature size. While AI and HPC demand cutting-edge nodes, most semiconductor applications still depend on mature nodes to strike the right balance of cost, power efficiency, and reliability.

    Takeaway

    In all, semiconductor node selection is a strategic trade-off between performance, cost, and market needs. Beyond node scaling, supply chain constraints and geopolitical factors influence manufacturing decisions, with only a few foundries producing sub-5nm chips. Meanwhile, mature nodes offer greater availability and cost stability, making them critical for mass production.

    As the industry moves ahead with the AI-First world, the future of semiconductor innovation will go beyond traditional node scaling, with chiplets, advanced packaging, and new transistor architectures shaping the next generation of chips.


  • The Semiconductor For X

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    Semiconductor Design for X (DFX) is a set of principles that can be applied to any product to improve its manufacturability, testability, reliability, and other critical technical aspects. With the ever-increasing complexity of semiconductor products, it has become crucial to ensure the DFX methodologies are applied correctly.

    The semiconductor DFX methodology helps by improving following:

    Manufacturability: DFX techniques make semiconductors easier to manufacture, which can lead to lower costs and higher yields. For example, the DFX techniques can reduce the number of process steps required to manufacture a semiconductor or make the process steps more robust to variations in materials and equipment.

    Testability: DFX makes it easier to test semiconductors, which can lead to higher-quality products. For example, DFX techniques create design test points in a semiconductor.

    Reliability: DFX drives semiconductors to be more reliable, which can lead to longer product lifetimes. For example, DFX techniques can ensure the design of semiconductors with better thermal or aging schemes.

    These are just a few examples of semiconductor design for X. There are many other considerations that semiconductor engineers must take into account when designing a semiconductor, such as materials, layout, and manufacturing flow.

    Materials: The choice of materials can significantly impact the manufacturability of a design. Semiconductor engineers must carefully consider the materials’ properties to ensure the semiconductor design can be manufactured cost-effectively.

    Design Layout: The design flow is also a critical DFM consideration. The process must ensure that the design can be manufactured efficiently. Semiconductor engineers use various tools and techniques to maximize the layout of a plan, such as floor planning, placement, and routing.

    Manufacturing Process: The manufacturing process itself can also significantly impact the manufacturability of a design. If not controlled, then it can lead to higher defects and ensure the plan meets the desired specifications. Semiconductor engineers must work closely with manufacturing engineers to ensure the design can get reliably manufactured.


    Picture By Chetan Arvind Patil

    In addition to the above, applying the DFX methods improves several critical aspects of semiconductor products:

    Performance: Improves the performance of semiconductors by reducing power consumption, increasing speed, or improving accuracy.

    Security: Increase the security of semiconductors by making them more resistant to tampering or hacking.

    Cost: Reduce the cost of semiconductors by making them easier to manufacture, test, and assemble.

    Variability: Helps in the reduction of variability of semiconductor process. It means that machines will be more consistent in their performance, which can improve reliability and quality.

    Variability: Helps in the reduction of variability of the semiconductor process. It means that machines will be more consistent in their performance, which can improve reliability and quality.

    Yield: DFX can also help improve the product yield by reviewing the process, devices, and other functional aspects thoroughly before fabrication.

    DFX has been a critical part of the semiconductor design process. By considering manufacturability, power, variability, cost, yield, and reliability from the earliest stages of design, semiconductor manufacturers can improve their products’ quality and performance while reducing costs and time to market.